[PATCH] D92973: [RISCV] Add intrinsics for vsetvli instruction
PeiHsiangHung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 9 22:28:19 PST 2020
NickHung added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:83
+ def int_riscv_vsetvlimax : Intrinsic<[llvm_anyint_ty],
+ /* VSEW */ [LLVMMatchType<0>,
+ /* VLMUL */ LLVMMatchType<0>],
----------------
vsetvlimax? Why not vsetvlmax defined in rvv intrinsic doc.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D92973/new/
https://reviews.llvm.org/D92973
More information about the llvm-commits
mailing list