[PATCH] D92973: [RISCV] Add intrinsics for vsetvli instruction

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:83
+  def int_riscv_vsetvlimax : Intrinsic<[llvm_anyint_ty],
+                            /* VSEW */ [LLVMMatchType<0>,
+                            /* VLMUL */ LLVMMatchType<0>],
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NickHung wrote:
> vsetvlimax? Why not vsetvlmax defined in rvv intrinsic doc.
Mainly wanted to match the instruction name that it selects. It would also avoid a conflict if a C intrinsic is ever proposed that takes the vtype in a register. The current C intrinsics all have a SEW and LMUL suffix to their name so a "vsetvlmax(size_t vtype)" could be added without a conflict.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92973/new/

https://reviews.llvm.org/D92973