[PATCH] D92973: [RISCV] Add intrinsics for vsetvli instruction
    Craig Topper via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed Dec  9 18:55:55 PST 2020
    
    
  
craig.topper added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:76
+  def int_riscv_vsetvli   : Intrinsic<[llvm_anyint_ty],
+                           /* AVX */  [LLVMMatchType<0>,
+                           /* VSEW */  LLVMMatchType<0>,
----------------
NickHung wrote:
> typo? AVL?
Oops. Thanks. I think my hands are used to typing AVX after years in X86.
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92973/new/
https://reviews.llvm.org/D92973
    
    
More information about the llvm-commits
mailing list