[PATCH] D92973: [RISCV] Add intrinsics for vsetvli instruction
PeiHsiangHung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 9 18:46:15 PST 2020
NickHung added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:76
+ def int_riscv_vsetvli : Intrinsic<[llvm_anyint_ty],
+ /* AVX */ [LLVMMatchType<0>,
+ /* VSEW */ LLVMMatchType<0>,
----------------
typo? AVL?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D92973/new/
https://reviews.llvm.org/D92973
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