[PATCH] D92228: [RISCV] Add MIR tests exposing missed InstAliases

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

I thought I'd put this up for review since it's (somehow) the first RISC-V MIR test, and in case anyone had looked into this before. I know @craig.topper has some experience with `InstAlias`.

>From a brief look, it looks like one way forward could be to allow `RegisterOperand` and `RegisterClass` records to use something like `MCOperandPredicate` when matching for aliases (with `AliasPatternCond::K_Custom`). I say "something like" because that's a property of `Operand`, not `RegisterOperand`.

That or just handle `zero_reg` for aliases, but I'm not yet aware of the broader implications of doing that.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D92228/new/

https://reviews.llvm.org/D92228