[PATCH] D91120: [DAGCombine][PowerPC] Convert negated abs to trivial arithmetic ops

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3221
+      SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, Shift);
+      AddToWorklist(Shift.getNode());
+      AddToWorklist(Xor.getNode());
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Hmm, it looks strange to me that we have to add these two ops into worklist manual. Isn't it added into worklist automatically as far as the parent node (SUB) returned ? Please correct me if I misunderstand this.


Repository:
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  https://reviews.llvm.org/D91120/new/

https://reviews.llvm.org/D91120