[PATCH] D91120: [DAGCombine][PowerPC] Convert negated abs to trivial arithmetic ops

[Kai Luo via Phabricator via llvm-commits]

lkail added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3221
+      SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, Shift);
+      AddToWorklist(Shift.getNode());
+      AddToWorklist(Xor.getNode());
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steven.zhang wrote:
> Hmm, it looks strange to me that we have to add these two ops into worklist manual. Isn't it added into worklist automatically as far as the parent node (SUB) returned ? Please correct me if I misunderstand this.
Good catch. I think the combine loop is supposed to add direct child nodes to the worklist. Since `AddToWorklist` uniques nodes added, I think it's also ok to call it manually. Another question arises, can we always rely on the behavior of the combine loop adding direct child node to the worklist automatically.


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  https://reviews.llvm.org/D91120/new/

https://reviews.llvm.org/D91120