[PATCH] D91712: [RISCV] Use register class VR for V instruction operands directly.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 18 10:26:49 PST 2020


craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91712/new/

https://reviews.llvm.org/D91712



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