[PATCH] D91541: [VE] Add lvm/svm intrinsic instructions

[Simon Moll via Phabricator via llvm-commits]

simoll added inline comments.


================
Comment at: llvm/lib/Target/VE/VEInstrInfo.cpp:722-723
+  case VE::LVMyim_y: {
+    unsigned VMXu = getVM512Upper(MI.getOperand(0).getReg());
+    unsigned VMXl = getVM512Lower(MI.getOperand(0).getReg());
+    int64_t Imm = MI.getOperand(1).getImm();
----------------
Looks like a good application for the `Register` type, here and for `Src`, `VMX`, ..


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91541/new/

https://reviews.llvm.org/D91541