[PATCH] D90905: [RISCV] Add an ANDI to shift amount of FSL/FSR instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D90905#2390924 <https://reviews.llvm.org/D90905#2390924>, @frasercrmck wrote:

> LGTM.
>
> Out of curiosity, can you use anything like `computeKnownBits` in TableGen patterns or would we have to do something in C++?

It can be called from the code part of a PatFrag. I think X86 does in a few places.


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