[PATCH] D91125: [AArch64][GlobalISel] Port some AArch64 target specific MUL combines from SDAG.

[Amara Emerson via Phabricator via llvm-commits]

aemerson updated this revision to Diff 304264.
aemerson added a comment.

Check for SEXT_INREG and use copy instead of modifying operand reg.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91125/new/

https://reviews.llvm.org/D91125

Files:
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
  llvm/test/CodeGen/AArch64/mul_pow2.ll

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