[PATCH] D91125: [AArch64][GlobalISel] Port some AArch64 target specific MUL combines from SDAG.
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 10 11:28:07 PST 2020
paquette added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp:157
+ MachineInstr &UseMI = *MRI.use_instr_begin(Dst);
+ if (UseMI.getOpcode() == TargetOpcode::G_ADD ||
+ UseMI.getOpcode() == TargetOpcode::G_SUB)
----------------
aemerson wrote:
> paquette wrote:
> > Should this be conservative around G_ICMP as well? It can be selected using SUBS/ADDS.
> Can a G_MUL be folded into an icmp?
Oh, I guess not. There's no flag-setting variant of mul, so that wouldn't make sense. So it's fine, I think.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp:225
+ }
+ // B.buildCopy(DstReg, Res.getReg(0));
+ Res->getOperand(0).setReg(DstReg);
----------------
aemerson wrote:
> paquette wrote:
> > Remove?
> This should probably actually be the copy, since we shouldn't be modifying an instruction without notifying the observer.
I guess ApplyFn could take in the observer as an argument, or `appleAArch64MulConstCombine` could notify the observer around the call?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91125/new/
https://reviews.llvm.org/D91125
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