[PATCH] D90730: [AMDGPU] Add default 1 glc operand to rtn atomics
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 5 04:07:03 PST 2020
dp accepted this revision.
dp added a comment.
This revision is now accepted and ready to land.
LGTM with a minor issue
================
Comment at: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:401
+ if (Res && (MCII->get(MI.getOpcode()).TSFlags &
+ (SIInstrFlags::MTBUF | SIInstrFlags::MUBUF |
+ SIInstrFlags::FLAT)) &&
----------------
Could MTBUF be removed?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90730/new/
https://reviews.llvm.org/D90730
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