[PATCH] D90730: [AMDGPU] Add default 1 glc operand to rtn atomics

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 302974.
rampitec retitled this revision from "[AMDGPU] Add default 1 glc operand to flat rtn atomics" to "[AMDGPU] Add default 1 glc operand to rtn atomics".
rampitec edited the summary of this revision.
rampitec added a comment.

Added the same change to MUBUF.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90730/new/

https://reviews.llvm.org/D90730

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/BUFInstructions.td
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/FLATInstructions.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
  llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
  llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
  llvm/test/CodeGen/AMDGPU/memory_clause.mir
  llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
  llvm/test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
  llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
  llvm/test/MC/AMDGPU/flat-gfx10.s
  llvm/test/MC/AMDGPU/flat-gfx9.s
  llvm/test/MC/AMDGPU/gfx1030_new.s

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