[PATCH] D90404: [AMDGPU] Add alignment check for v3 to v4 load type promotion

Christudasan Devadasan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 30 11:49:42 PDT 2020


cdevadas updated this revision to Diff 301970.
cdevadas added a comment.

Addressed the suggestion by @foad to include the Dereferenceable check on MMO.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90404/new/

https://reviews.llvm.org/D90404

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/bfi_int.ll
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/AMDGPU/fshr.ll
  llvm/test/CodeGen/AMDGPU/merge-stores.ll
  llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
  llvm/test/CodeGen/AMDGPU/sign_extend.ll
  llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D90404.301970.patch
Type: text/x-patch
Size: 19669 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201030/b33e5cd6/attachment.bin>


More information about the llvm-commits mailing list