[PATCH] D90404: [AMDGPU] Add alignment check for v3 to v4 load type promotion

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 30 13:07:53 PDT 2020


foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

LGTM. As a further cleanup I wonder if it would be better to have a WidenOrSplitVectorLoad function which does the "NumElements == 3 && (Alignment >= 8 || Is16ByteKnownDereferenceable)" check for you.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90404/new/

https://reviews.llvm.org/D90404



More information about the llvm-commits mailing list