[PATCH] D90176: [AArch64] Improve lowering of insert_vector_elt with 0.0 consts.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> but for some reason the matching does not work for f16

I think isFPImmLegal is false, so we're forcing a constant pool.  I think you can make the testcase work with +fullfp16?


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  https://reviews.llvm.org/D90176/new/

https://reviews.llvm.org/D90176