[PATCH] D90242: [AMDGPU] Fix check prefix for VOP3 VI disassembler tests

Tue Oct 27 09:02:05 PDT 2020

foad added reviewers: dp, rampitec, vpykhtin.
foad added a comment.

These tests were added in D36322 <https://reviews.llvm.org/D36322>.

A similar fix for the VOP2 GFX9 tests was made in D36674 <https://reviews.llvm.org/D36674>.

================
Comment at: llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt:300

-# CHECK: v_mad_i16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04]
+# VI: v_mad_i16 v5, 0x3800, v2, v3    ; encoding: [0x05,0x00,0xec,0xd1,0xff,0x04,0x0e,0x04]
 0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04
----------------
The inline constant is disassembled as 0x3800 not 0.5.

SIMCCodeEmitter does not recognise this constant as an inline 16-bit integer, so the encoding: line shows **0xff** not 0xf0.

What is the correct behaviour here?

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D90242/new/

https://reviews.llvm.org/D90242