[PATCH] D90242: [AMDGPU] Fix check prefix for VOP3 VI disassembler tests
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 27 09:36:57 PDT 2020
rampitec added inline comments.
================
Comment at: llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt:300
-# CHECK: v_mad_i16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04]
+# VI: v_mad_i16 v5, 0x3800, v2, v3 ; encoding: [0x05,0x00,0xec,0xd1,0xff,0x04,0x0e,0x04]
0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04
----------------
foad wrote:
> The inline constant is disassembled as 0x3800 not 0.5.
>
> SIMCCodeEmitter does not recognise this constant as an inline 16-bit integer, so the encoding: line shows **0xff** not 0xf0.
>
> What is the correct behaviour here?
It should be f0.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90242/new/
https://reviews.llvm.org/D90242
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