[PATCH] D90242: [AMDGPU] Fix check prefix for VOP3 VI disassembler tests

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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foad requested review of this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90242

Files:
  llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt


Index: llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt
===================================================================
--- llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt
+++ llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt
@@ -261,58 +261,58 @@
 # VI: v_fma_f16 v5, v1, v2, v3 clamp    ; encoding: [0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04]
 0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04
 
-# CHECK: v_div_fixup_f16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04]
+# VI: v_div_fixup_f16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04]
 0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04
 
-# CHECK: v_div_fixup_f16 v5, v1, 0.5, v3    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0xe1,0x0d,0x04]
+# VI: v_div_fixup_f16 v5, v1, 0.5, v3    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0xe1,0x0d,0x04]
 0x05,0x00,0xef,0xd1,0x01,0xe1,0x0d,0x04
 
-# CHECK: v_div_fixup_f16 v5, v1, v2, 0.5    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xc2,0x03]
+# VI: v_div_fixup_f16 v5, v1, v2, 0.5    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xc2,0x03]
 0x05,0x00,0xef,0xd1,0x01,0x05,0xc2,0x03
 
-# CHECK: v_div_fixup_f16 v5, -v1, -v2, -v3    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0xe4]
+# VI: v_div_fixup_f16 v5, -v1, -v2, -v3    ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0xe4]
 0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0xe4
 
-# CHECK: v_div_fixup_f16 v5, |v1|, |v2|, |v3|    ; encoding: [0x05,0x07,0xef,0xd1,0x01,0x05,0x0e,0x04]
+# VI: v_div_fixup_f16 v5, |v1|, |v2|, |v3|    ; encoding: [0x05,0x07,0xef,0xd1,0x01,0x05,0x0e,0x04]
 0x05,0x07,0xef,0xd1,0x01,0x05,0x0e,0x04
 
-# CHECK: v_div_fixup_f16 v5, v1, v2, v3 clamp    ; encoding: [0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04]
+# VI: v_div_fixup_f16 v5, v1, v2, v3 clamp    ; encoding: [0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04]
 0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04
 
-# CHECK: v_mad_f16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04]
+# VI: v_mad_f16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04]
 0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04
 
-# CHECK: v_mad_f16 v5, v1, 0.5, v3    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0xe1,0x0d,0x04]
+# VI: v_mad_f16 v5, v1, 0.5, v3    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0xe1,0x0d,0x04]
 0x05,0x00,0xea,0xd1,0x01,0xe1,0x0d,0x04
 
-# CHECK: v_mad_f16 v5, v1, v2, 0.5    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0xc2,0x03]
+# VI: v_mad_f16 v5, v1, v2, 0.5    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0xc2,0x03]
 0x05,0x00,0xea,0xd1,0x01,0x05,0xc2,0x03
 
-# CHECK: v_mad_f16 v5, -v1, -v2, -v3    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0xe4]
+# VI: v_mad_f16 v5, -v1, -v2, -v3    ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0xe4]
 0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0xe4
 
-# CHECK: v_mad_f16 v5, |v1|, |v2|, |v3|    ; encoding: [0x05,0x07,0xea,0xd1,0x01,0x05,0x0e,0x04]
+# VI: v_mad_f16 v5, |v1|, |v2|, |v3|    ; encoding: [0x05,0x07,0xea,0xd1,0x01,0x05,0x0e,0x04]
 0x05,0x07,0xea,0xd1,0x01,0x05,0x0e,0x04
 
-# CHECK: v_mad_f16 v5, v1, v2, v3 clamp    ; encoding: [0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04]
+# VI: v_mad_f16 v5, v1, v2, v3 clamp    ; encoding: [0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04]
 0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04
 
-# CHECK: v_mad_i16 v5, 0.5, v2, v3    ; encoding: [0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04]
+# VI: v_mad_i16 v5, 0x3800, v2, v3    ; encoding: [0x05,0x00,0xec,0xd1,0xff,0x04,0x0e,0x04]
 0x05,0x00,0xec,0xd1,0xf0,0x04,0x0e,0x04
 
-# CHECK: v_mad_i16 v5, v1, 0.5, v3    ; encoding: [0x05,0x00,0xec,0xd1,0x01,0xe1,0x0d,0x04]
+# VI: v_mad_i16 v5, v1, 0x3800, v3    ; encoding: [0x05,0x00,0xec,0xd1,0x01,0xff,0x0d,0x04]
 0x05,0x00,0xec,0xd1,0x01,0xe1,0x0d,0x04
 
-# CHECK: v_mad_i16 v5, v1, v2, 0.5    ; encoding: [0x05,0x00,0xec,0xd1,0x01,0x05,0xc2,0x03]
+# VI: v_mad_i16 v5, v1, v2, 0x3800    ; encoding: [0x05,0x00,0xec,0xd1,0x01,0x05,0xfe,0x03]
 0x05,0x00,0xec,0xd1,0x01,0x05,0xc2,0x03
 
-# CHECK: v_mad_u16 v5, 0, v2, v3    ; encoding: [0x05,0x00,0xeb,0xd1,0x80,0x04,0x0e,0x04]
+# VI: v_mad_u16 v5, 0, v2, v3    ; encoding: [0x05,0x00,0xeb,0xd1,0x80,0x04,0x0e,0x04]
 0x05,0x00,0xeb,0xd1,0x80,0x04,0x0e,0x04
 
-# CHECK: v_mad_u16 v5, v1, -1, v3    ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x83,0x0d,0x04]
+# VI: v_mad_u16 v5, v1, -1, v3    ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x83,0x0d,0x04]
 0x05,0x00,0xeb,0xd1,0x01,0x83,0x0d,0x04
 
-# CHECK: v_mad_u16 v5, v1, v2, -4.0    ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xde,0x03]
+# VI: v_mad_u16 v5, v1, v2, 0xc400    ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xfe,0x03]
 0x05,0x00,0xeb,0xd1,0x01,0x05,0xde,0x03
 
 # VI: v_interp_mov_f32_e64 v5, p10, attr0.x    ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]


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