[PATCH] D87231: [AArch64] Match pairwise add/fadd pattern

[Sanne Wouda via Phabricator via llvm-commits]

sanwou01 updated this revision to Diff 292484.
sanwou01 added a comment.

Fix for when there is no fp16 faddp + testing


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87231/new/

https://reviews.llvm.org/D87231

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/faddp-half.ll
  llvm/test/CodeGen/AArch64/faddp.ll
  llvm/test/CodeGen/AArch64/vecreduce-fadd.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D87231.292484.patch
Type: text/x-patch
Size: 11420 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200917/ab1c44e6/attachment.bin>