[PATCH] D85767: [AMDGPU] Spill register and offset register cannot be same

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/frame-pointer-spill.mir:4
+---
+name:            foo
+tracksRegLiveness: true
----------------
Could use better name and comment what this is testing


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85767/new/

https://reviews.llvm.org/D85767