[PATCH] D85767: [AMDGPU] Spill register and offset register cannot be same

[Mahesha S via Phabricator via llvm-commits]

hsmhsm updated this revision to Diff 285369.
hsmhsm added a comment.

Fixed further review comments by Matt


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85767/new/

https://reviews.llvm.org/D85767

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/test/CodeGen/AMDGPU/frame-pointer-spill.mir

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