[PATCH] D83811: [AArch64][SVE] Add support for trunc to <vscale x N x i1>.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 14 13:43:11 PDT 2020


sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM, thanks!



================
Comment at: llvm/test/CodeGen/AArch64/sve-trunc.ll:69
+; CHECK-NEXT:    ptrue p0.d
+; CHECK-NEXT:    and z0.d, z0.d, #0x1
+; CHECK-NEXT:    cmpne p0.d, p0/z, z0.d, #0
----------------
It seems our downstream compiler uses `lsl` with `#(elementwidth-1)` instead of `and #0x1`, but using `and` seems a bit more intuitive.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83811/new/

https://reviews.llvm.org/D83811





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