[PATCH] D83811: [AArch64][SVE] Add support for trunc to <vscale x N x i1>.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 14 13:56:52 PDT 2020
paulwalker-arm added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:19070
+ unsigned PartNumElem =
+ N->getOperand(0).getValueType().getVectorElementCount().Min;
----------------
Could use getVectorMinNumElements() here.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:2567
// if we're trying to split it at all. assert() that's true, just in case.
- assert(!(NumElements & 1) && "Splitting vector, but not in half!");
+ assert(!(NumElements.Min & 1) && "Splitting vector, but not in half!");
----------------
Since this is now an ElementCount this could be
```assert(ElementCount / 2 && ....```
which already asserts the division is lossless.
================
Comment at: llvm/test/CodeGen/AArch64/sve-trunc.ll:77-144
+define <vscale x 4 x i1> @trunc_i64toi1_split(<vscale x 4 x i64> %in) {
+; CHECK-LABEL: trunc_i64toi1_split:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z1.d, z1.d, #0x1
+; CHECK-NEXT: and z0.d, z0.d, #0x1
+; CHECK-NEXT: cmpne p1.d, p0/z, z1.d, #0
----------------
Based on the assumption that these tests are really testing the CONCAT_VECTORS functionality, is it worth naming them as such (perhaps also move into sve-shuffles.ll or something)?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83811/new/
https://reviews.llvm.org/D83811
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