[PATCH] D83137: [SVE][CodeGen] Legalisation of masked loads and stores
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 7 01:59:29 PDT 2020
sdesmalen added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7155
+ DAG.getVScale(DL, AddrVT,
+ APInt(Addr.getValueSizeInBits().getFixedSize(),
+ DataVT.getSizeInBits().getKnownMinSize() / 8));
----------------
Given that the type of VScale will be `AddrVT`, it's clearer to use `AddrVT.getSizeInBits().getFixedSize()`, that avoids the types being different.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7156
+ APInt(Addr.getValueSizeInBits().getFixedSize(),
+ DataVT.getSizeInBits().getKnownMinSize() / 8));
} else
----------------
Should this be using `DataVT.getStoreSize()` instead of `DataVT.getSizeInBits()` ?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83137/new/
https://reviews.llvm.org/D83137
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