[PATCH] D82541: [AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB

[Victor Campos via Phabricator via llvm-commits]

vhscampos marked 2 inline comments as done.
vhscampos added inline comments.


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Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1511
+  unsigned Rt = fieldFromInstruction(insn, 0, 5);
+  unsigned Rn = fieldFromInstruction(insn, 5, 5);
+  uint64_t offset = fieldFromInstruction(insn, 22, 1) << 9 |
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DavidSpickett wrote:
> This should be 5, 9. I presume the tests pass because they all use x0.
Are you sure? The third argument is the number of bits to be read.


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Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1521
+  case AArch64::LDRABwriteback:
+    DecodeGPR64spRegisterClass(Inst, Rn /* writeback register */, Addr,
+                               Decoder);
----------------
DavidSpickett wrote:
> What does this first decode do, is it not enough to Decode it below?
The writeback variants have an additional operand: the writeback register. Therefore when decoding those variants, it is necessary to perform one additional operand decoding.


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  https://reviews.llvm.org/D82541/new/

https://reviews.llvm.org/D82541