[PATCH] D82541: [AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB
David Spickett via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 25 06:20:31 PDT 2020
DavidSpickett added inline comments.
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Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1511
+ unsigned Rt = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ uint64_t offset = fieldFromInstruction(insn, 22, 1) << 9 |
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This should be 5, 9. I presume the tests pass because they all use x0.
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Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1521
+ case AArch64::LDRABwriteback:
+ DecodeGPR64spRegisterClass(Inst, Rn /* writeback register */, Addr,
+ Decoder);
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What does this first decode do, is it not enough to Decode it below?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82541/new/
https://reviews.llvm.org/D82541
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