[PATCH] D82440: [Power10] Implement Vector Shift Double Bit Immediate Builtins in LLVM/Clang

[Biplob Mishra via Phabricator via llvm-commits]

biplmish added inline comments.


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Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:89
+  // CHECK-NEXT: ret <16 x i8>
+  return vec_sldb(vsca, vscb, 0);
+}
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amyk wrote:
> `SH` can be any integer value between 0 and 7. It is better to add some checking to make sure the immediate is between these values.
I dont see the shift bounds specified. Can you confirm.


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  https://reviews.llvm.org/D82440/new/

https://reviews.llvm.org/D82440