[PATCH] D81506: [X86] Automatically harden inline assembly RET instructions against Load Value Injection (LVI)

[Scott Constable via Phabricator via llvm-commits]

sconstab marked an inline comment as done.
sconstab added inline comments.


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Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3216
     emitWarningForSpecialLVIInstruction(Inst.getLoc());
+    Out.emitInstruction(Inst, getSTI());
     return true;
----------------
craig.topper wrote:
> Why did emitInstruction have to get repeated everywhere? Aren't we still emitting the original ret from the user after the mitigation? So its not any different than inserting an LFENCE. Am I missing something?
It's a little more complicated now because the `ret` mitigation requires the `LFENCE` to be inserted *before* `ret`, whereas all other loading instructions need the `LFENCE` after. But maybe there is a cleaner way to implement this that I am missing?


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https://reviews.llvm.org/D81506