[PATCH] D81506: [X86] Automatically harden inline assembly RET instructions against Load Value Injection (LVI)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3216
     emitWarningForSpecialLVIInstruction(Inst.getLoc());
+    Out.emitInstruction(Inst, getSTI());
     return true;
----------------
sconstab wrote:
> craig.topper wrote:
> > Why did emitInstruction have to get repeated everywhere? Aren't we still emitting the original ret from the user after the mitigation? So its not any different than inserting an LFENCE. Am I missing something?
> It's a little more complicated now because the `ret` mitigation requires the `LFENCE` to be inserted *before* `ret`, whereas all other loading instructions need the `LFENCE` after. But maybe there is a cleaner way to implement this that I am missing?
right the others are after. why can't i ever remember that.

What if we called applyLVICFIMitigation before the emitInstruction and called applyLVILoadHardeningMitigation after?


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  https://reviews.llvm.org/D81506/new/

https://reviews.llvm.org/D81506