[PATCH] D81275: [AMDGPU] Move default initialization of M0 register after the instruction selection

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin marked 8 inline comments as done.
vpykhtin added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:55
+  // initialize M0 in SITargetLowering::AdjustInstrPostInstrSelection
+  let hasPostISelHook = has_m0_read;
 }
----------------
vpykhtin wrote:
> arsenm wrote:
> > Could you just set hasPostISelHook to 0 for the special cases?
> I thought to do it this way, the hook is also used for converting to no-ret atomics, I need to check if there is a case for atomic but not for default M0 init. 
I decided to left readM0 check to distinguish from no-ret atomics usage.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81275/new/

https://reviews.llvm.org/D81275