[PATCH] D81275: [AMDGPU] Move default initialization of M0 register after the instruction selection

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 9 12:40:48 PDT 2020


arsenm added a comment.

I just had the realization this may be more appropriate to place in EmitInstrWithCustomInserter, rather than AdjustInstrPostInstrSelection. Since we have to specially treat most of the other special case DS instructions, you'll avoid the need to blacklist more of them. There might be an issue with where the verifier runs between isel and finalize-isel though



================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10853
 
+  if (TII->isDS(MI) && MI.getNumMemOperands())
+    initDefaultM0(MI);
----------------
Shouldn't rely on getNumMemOperands. SelectionDAG has been known to occasionally drop memory operands


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  https://reviews.llvm.org/D81275/new/

https://reviews.llvm.org/D81275





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