[PATCH] D81275: [AMDGPU] Move default initialization of M0 register after the instruction selection
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 9 07:39:39 PDT 2020
vpykhtin updated this revision to Diff 269538.
vpykhtin added a comment.
Updated patch. Everything is done except I decided to left readsM0 check for the no-ret atomics case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81275/new/
https://reviews.llvm.org/D81275
Files:
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/DSInstructions.td
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.h
llvm/test/CodeGen/AMDGPU/ds_read2.ll
llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
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