[PATCH] D78177: [VE] Update logical operation instructions

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 marked an inline comment as done.
kaz7 added inline comments.


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Comment at: llvm/lib/Target/VE/VEInstrInfo.td:913
+let cw = 1, cw2 = 1 in defm CMOVS : RRCMOVm<"cmov.s.${cfw}", 0x3B, F32, f32>;
+def : MnemonicAlias<"cmov.l", "cmov.l.at">;
+def : MnemonicAlias<"cmov.w", "cmov.w.at">;
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simoll wrote:
> First time i am seeing this feature. Do we need this to match mnemonic aliases when parsing assembly?
Yes.  With this MenmonicAlias, llvm-mc can parse "cmov.l" as a shorten "cmov.l.at" instruction.  NEC assembler allows both of them, so we also allow them to maximize user's choices.

May I defer these to coming llvm-mc patch sets?


Repository:
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  https://reviews.llvm.org/D78177/new/

https://reviews.llvm.org/D78177