[PATCH] D76649: [X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG.

[Craig Topper via Phabricator via llvm-commits]

craig.topper marked an inline comment as done.
craig.topper added a comment.

In D76649#1944257 <https://reviews.llvm.org/D76649#1944257>, @spatel wrote:

> There's still 1 other use of the flag in DAGCombiner IIUC, but if we can find a way to get rid of that too, that would be great.


Isn't the use in DAGCombiner just a check to prevent reassociation so we don't lose the flag?



================
Comment at: llvm/lib/Target/X86/X86PartialReduction.cpp:69
+
+static bool isVectorReductionOp(const BinaryOperator &BO) {
+  if (!BO.getType()->isVectorTy())
----------------
spatel wrote:
> Is this identical to the existing code in SelectionDAGBuilder? Could we hoist that to VectorUtils.cpp, so we don't have duplicate code?
Isn't the code in SelectionDAGBuilder just there to set the flag? Once that's gone then there won't be any duplication.


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https://reviews.llvm.org/D76649