[PATCH] D76716: [ARM][MVE] Tail predicate VMAXV(unsigned) and VMAXAV
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 24 11:49:17 PDT 2020
SjoerdMeijer added a comment.
The unit test failure looks genuine, does that needs fixing?
A minor question inlined.
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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:850
+multiclass MVE_VMAXV_ty<string iname, string intrBaseName> {
+ defm s8 : MVE_VMINMAXV_p<iname, 1, 0, 0, MVE_v16s8, intrBaseName>;
+ defm s16: MVE_VMINMAXV_p<iname, 1, 0, 0, MVE_v8s16, intrBaseName>;
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same for these 3 (why not suitable for TP?)
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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:897
-defm MVE_VMINAV : MVE_VMINMAXAV_ty<"vminav", 1, "int_arm_mve_minav">;
-defm MVE_VMAXAV : MVE_VMINMAXAV_ty<"vmaxav", 0, "int_arm_mve_maxav">;
+defm MVE_VMINAV : MVE_VMINMAXAV_ty<"vminav", 1, 0, "int_arm_mve_minav">;
+defm MVE_VMAXAV : MVE_VMINMAXAV_ty<"vmaxav", 0, 1, "int_arm_mve_maxav">;
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I am being lazy here (haven't checked the ARMARM), but why is this vmin not suitable for TP?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D76716/new/
https://reviews.llvm.org/D76716
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