[PATCH] D74471: [AArch64][SVE] Add predicate reinterpret intrinsics
Cullen Rhodes via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 05:47:41 PST 2020
c-rhodes updated this revision to Diff 245828.
c-rhodes added a comment.
- Fix zeroing.
- Update tests.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74471/new/
https://reviews.llvm.org/D74471
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
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