[PATCH] D74915: [AMDGPU] Implement wave64 DWARF register mapping

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:106
+// Pseudo-register to represent the program-counter DWARF register.
+def PC_REG : SIReg<"pc", 0>, DwarfRegNum<[16]>;
 
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Should be marked as an artificial register?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74915/new/

https://reviews.llvm.org/D74915