[PATCH] D74147: [AArch64] Add BIT/BIF support.

[Pavel Iliin via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGb6a9fe209992: [AArch64] Add BIT/BIF support. (authored by ilinpv).

Changed prior to commit:
  https://reviews.llvm.org/D74147?vs=244598&id=244642#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74147/new/

https://reviews.llvm.org/D74147

Files:
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SchedA57.td
  llvm/lib/Target/AArch64/AArch64SchedCyclone.td
  llvm/lib/Target/AArch64/AArch64SchedExynosM3.td
  llvm/lib/Target/AArch64/AArch64SchedExynosM4.td
  llvm/lib/Target/AArch64/AArch64SchedExynosM5.td
  llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
  llvm/lib/Target/AArch64/AArch64SchedKryoDetails.td
  llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td
  llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
  llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
  llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
  llvm/test/CodeGen/AArch64/fp16-vector-shuffle.ll
  llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
  llvm/test/CodeGen/AArch64/sat-add.ll
  llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
  llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll
  llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask.ll
  llvm/test/CodeGen/AArch64/urem-seteq-vec-nonsplat.ll
  llvm/test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll

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