[PATCH] D74147: [AArch64] Add BIT/BIF support.
Vlad Vereschaka via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 14 11:26:11 PST 2020
vvereschaka added a comment.
Hello @ilinpv,
these changes break the tests on the expensive check builder
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-ubuntu/builds/2884
*** Bad machine code: Explicit definition marked as use ***
- function: test5
- basic block: %bb.0 entry (0x558983ebb6b8)
- instruction: ORRv16i8 $q0, killed renamable $q1, killed renamable $q1
- operand 0: $q0
*** Bad machine code: Using an undefined physical register ***
- function: test5
- basic block: %bb.0 entry (0x558983ebb6b8)
- instruction: ORRv16i8 $q0, killed renamable $q1, killed renamable $q1
- operand 0: $q0
*** Bad machine code: Using an undefined physical register ***
- function: test5
- basic block: %bb.0 entry (0x558983ebb6b8)
- instruction: renamable $q0 = BSLv16i8 $q0(tied-def 0), killed renamable $q2, killed renamable $q3
- operand 1: $q0(tied-def 0)
LLVM ERROR: Found 3 machine code errors.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74147/new/
https://reviews.llvm.org/D74147
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