[llvm] 8d2e6bd - [TargetLowering] SimplifyDemandedBits - Pull out InDemandedMask variable to ISD::SHL. NFCI.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-01-21T10:40:18Z
New Revision: 8d2e6bdbe144b5855c4ae23d95c7e306075e4fdd

URL: https://github.com/llvm/llvm-project/commit/8d2e6bdbe144b5855c4ae23d95c7e306075e4fdd
DIFF: https://github.com/llvm/llvm-project/commit/8d2e6bdbe144b5855c4ae23d95c7e306075e4fdd.diff

LOG: [TargetLowering] SimplifyDemandedBits - Pull out InDemandedMask variable to ISD::SHL. NFCI.

Matches ISD::SRA + ISD::SRL variants.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 96614bb1c777..90be876b6758 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1355,8 +1355,9 @@ bool TargetLowering::SimplifyDemandedBits(
         }
       }
 
-      if (SimplifyDemandedBits(Op0, DemandedBits.lshr(ShAmt), DemandedElts,
-                               Known, TLO, Depth + 1))
+      APInt InDemandedMask = DemandedBits.lshr(ShAmt);
+      if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO,
+                               Depth + 1))
         return true;
 
       // Try shrinking the operation as long as the shift amount will still be