[PATCH] D66210: [RISCV] Enable the machine outliner for RISC-V

Ana Pazos via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 19 08:33:44 PST 2019

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apazos added a comment.

Thanks Lewis for providing the test case. A bug can be opened for the machine outliner with that example. In my opinion you can go ahead and merge this patch.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D66210/new/

https://reviews.llvm.org/D66210

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