[PATCH] D71581: [X86] Fix an 8 bit testb being selected when folding a volatile i32 load pattern.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a subscriber: reames.
craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:5104
+        if (auto *LoadN = dyn_cast<LoadSDNode>(N0.getOperand(0).getNode())) {
+          if (LoadN->isVolatile()) {
+            unsigned NumVolBits = LoadN->getValueType(0).getSizeInBits();
----------------
@reames should this be !LoadN->isSimple()?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71581/new/

https://reviews.llvm.org/D71581