[PATCH] D70667: [ARM] Fix instruction selection for ARMISD::CMOV with f16 type

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Yeah I think ran into this on one or two of the MVE cases.

Looks sensible to me, with a minor point about HasFPRegs.



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Comment at: llvm/lib/Target/ARM/ARMInstrVFP.td:2287
+                          (ARMcmov HPR:$Sn, HPR:$Sm, cmovpred:$p))]>,
+               RegConstraint<"$Sd = $Sn">, Requires<[HasFPRegs16]>;
 } // hasSideEffects
----------------
If this is ending up as a VMOVS, it can actually be HasFPRegs? I guess it shouldn't matter though, if we are not ever selecting the ARMcmov for an fp16.

The itinerary could also be IIC_fpUNA32, but I don't think they will really be used anywhere or make much of a difference.

If HasFPRegs looks like it will cause problems in any way, then HasFPRegs16 would be fine too.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D70667/new/

https://reviews.llvm.org/D70667