[PATCH] D70667: [ARM] Fix instruction selection for ARMISD::CMOV with f16 type

[Victor Campos via Phabricator via llvm-commits]

vhscampos updated this revision to Diff 231496.
vhscampos added a comment.

Require single-precision floating-point registers instead.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70667/new/

https://reviews.llvm.org/D70667

Files:
  llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARMInstrVFP.td
  llvm/test/CodeGen/ARM/cmov_fp16.ll

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