[PATCH] D70401: [RISCV] Implement ilp32e ABI

[Sam Elliott via Phabricator via llvm-commits]

lenary created this revision.
lenary added reviewers: luismarques, shiva0217, asb.
Herald added subscribers: llvm-commits, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.

ILP32E is a calling convention for 32-bit RISC-V which only uses the 16
registers from the RV32E base architecture. The calling convention has a
different stack alignment, and has fewer argument registers.

Importantly, the ABI chosen does not influence which registers should be
saved when an interrupt happens (this choice is made based on the
available architectural extensions).

This patch paves the way for adding full RV32E support.

This is based upon D59592 <https://reviews.llvm.org/D59592> by Daliang Xu (xudaliang.pku). I have fixed
the issue with interrupt CSRs, and excessive duplication of the GPR
list.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70401

Files:
  llvm/lib/Target/RISCV/RISCVCallingConv.td
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVFrameLowering.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
  llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
  llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
  llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
  llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
  llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
  llvm/test/CodeGen/RISCV/stack-realignment.ll
  llvm/test/CodeGen/RISCV/target-abi-valid.ll

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