[PATCH] D70402: [AMDGPU][DPP] Corrected DPP combiner

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG525f9c0be538: [AMDGPU][DPP] Corrected DPP combiner (authored by dp).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70402/new/

https://reviews.llvm.org/D70402

Files:
  llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp


Index: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
+++ llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
@@ -104,6 +104,9 @@
     AU.setPreservesCFG();
     MachineFunctionPass::getAnalysisUsage(AU);
   }
+
+private:
+  int getDPPOp(unsigned Op) const;
 };
 
 } // end anonymous namespace
@@ -118,13 +121,13 @@
   return new GCNDPPCombine();
 }
 
-static int getDPPOp(unsigned Op) {
+int GCNDPPCombine::getDPPOp(unsigned Op) const {
   auto DPP32 = AMDGPU::getDPPOp32(Op);
-  if (DPP32 != -1)
-    return DPP32;
-
-  auto E32 = AMDGPU::getVOPe32(Op);
-  return E32 != -1 ? AMDGPU::getDPPOp32(E32) : -1;
+  if (DPP32 == -1) {
+    auto E32 = AMDGPU::getVOPe32(Op);
+    DPP32 = (E32 == -1)? -1 : AMDGPU::getDPPOp32(E32);
+  }
+  return (DPP32 == -1 || TII->pseudoToMCOpcode(DPP32) == -1) ? -1 : DPP32;
 }
 
 // tracks the register operand definition and returns:


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D70402.230236.patch
Type: text/x-patch
Size: 963 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191120/344d46ae/attachment-0001.bin>