[PATCH] D67110: AMDGPU: Make VReg_1 size be 1

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

This was getting chosen as the preferred 32-bit register class based
on how TableGen selects subregister classes.


https://reviews.llvm.org/D67110

Files:
  lib/Target/AMDGPU/SILowerI1Copies.cpp
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  lib/Target/AMDGPU/SIRegisterInfo.td
  test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
  test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
  test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir

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