[PATCH] D67104: GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 3 09:18:13 PDT 2019
paquette added inline comments.
================
Comment at: utils/TableGen/GlobalISelEmitter.cpp:4111
+ if (Name == "REG_SEQUENCE") {
+ if (!Dst->getChild(0)->isLeaf())
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I think the REG_SEQUENCE part should be a separate patch, along with the `SubRegIndexRenderer` (since it's only used here)
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67104/new/
https://reviews.llvm.org/D67104
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